PCIe 6.0 Is Already Outdated, So Here’s The First Draft Of PCIe 7.0

Source: The Register PCIe 6.0 Is Already Outdated, So Here’s The First Draft Of PCIe 7.0

Life In The Fast Lane

While we haven’t even seen PCIe 6.0, the PCI SIG consortium have been busily drafting up PCIe 7.0 and today they released our first look at what it will be capable of.  The new spec is unlikely to herald the arrival of insanely fast GPUs, even the current generations of cards have more than enough bandwidth on a PCIe 4.0 16x slot.  It might offer an interesting challenge to Phison and other SSD controller makers, who are busily saturating PCIe 5.0 connections but the real driver for the new spec is networking.

The PCIe 6.0 specifications describe a theoretical maximum bidirectional bandwidth of of 256GB/s from a 16x slot, which is certainly impressive but not enough to feed the growing LLM industry.  A PCIe 6.0 16x slot can only support a single 800Gb/s NIC, which is not enough to satisfy the needs a large machine learning clusters and has led to Intel, NVIDIA and others adopting their own solutions.  A PCIe 7.0 16x slot would offer double that theoretical bandwidth, and 512GB/s of bidirectional bandwidth and that means we would breach the terabyte barrier with cards capable of 1.6Tb/s.  That isn’t quite enough to match Nvidia’s NVLink or AMD’s Infinity Fabric interconnects but it should keep PCIe viable for ‘slower’ solutions

That increase in bandwidth will also allow Compute Express Link to perform some interesting new tricks, The Register points out that this will make PCIe attached RAM far more feasible.  Take a look at how that might work and the possible usage for it here.

12VHPWR on my storage?!?

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Jeremy Hellstrom

Call it K7M.com, AMDMB.com, or PC Perspective, Jeremy has been hanging out and then working with the gang here for years. Apart from the front page you might find him on the BOINC Forums or possibly the Fraggin' Frogs if he has the time.

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